Arm7Tdmi Interview Questions

This article is mainly focused on the most repeatedly asked embedded system interview questions. If you are looking for “embedded system interview questions” or “simple questions on embedded systems”, then you at the right place.

Here I have tried to create some collection of “embedded system interview questions with answers” that might ask by your interviewer. These embedded system questions not only for fresher but also good for the experienced person.

I hope these embedded system interview questions with the answer will be helpful. If you have any other important questions relate to the embedded systems and concepts or want to give the answer to any mentioned embedded systems interview questions, then please write in the comment box. It is helpful to others.

There are some instructions in assembly language program which are not a part of processor instruction set. These instructions to assembler, linker and loader. They are referred as assembler directives. The assembler directives enable us to control the way in which a program assembles and lists. They acts during the assembly of program and do not generate any executable machine code i.e. code, data.

A Two-Pass Assembler does two passes over the source file (the second pass can be over a file generated in first pass). In the first pass all it does is looks for label definitions and introduces them in the symbol table. In the second pass after the symbol table is complete, it does the actual assembly by translating the operations and so on.

A technique used in advanced microprocessors where microprocessor begins executing a second instruction before first has been completed. That is several instructions are in the pipeline simultaneously each at different processing stage. For example: in 8086 to speed up the executing program, the instructions fetching and execution of instructions are overlapped each other. This is known as pipelining.

A Microprocessor executes a collection of machine instructions that tell the processor, what to do is known as assembly process.

When IO devices are memory mapped, some of the addresses are allotted to IO devices. And so the full address space can’t be used for addressing memory i.e. physical memory address space will be reduced. Hence memory mapping is useful only for small systems where the memory requirement is less.

4. ARM7 has an in-built debugging device? a) True b) False View AnswerAnswer: a Explanation: Some ARM7 cores are obsolete. It had a JTAG based on-chip debugging; the preceding ARM6 cores did not support it. The “D” represented a JTAG TAP for debugging.

8. What are t, d, m, I stands for in ARM7TDMI? a) Timer, Debug, Multiplex, ICE b) Thumb, Debug, Multiplier, ICE c) Timer, Debug, Modulation, IS d) Thumb, Debug, Multiplier, ICE View AnswerAnswer: b Explanation: The ARM7TDMI(ARM7 + 16 bit Thumb + JTAG Debug + fast Multiplier + enhanced ICE) processor implements the ARM4 instruction set.

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13. How many instructions pipelining is used in ARM7EJ-S? a) 3-Stage b) 4-Stage c) 5-Stage d)2-stage View AnswerAnswer: c Explanation: A five-stage pipelining is used, consisting of Fetch, Decode, Execute, Memory, and Writeback stages. A six-stage pipelining is used in Jazelle state, consisting of Fetch, Jazelle, Execute, Memory, and Writeback stages.

10. What are the profiles for ARM architecture? a) A,R b) A,M c) A,R,M d) R,M View AnswerAnswer: c Explanation: ARMv7 defines 3 architecture “profiles”: A-profile, Application profile R-profile, Real-time profile M-profile, Microcontroller profile.

Answer: c Clarification: ARM7TDMI has 37 registers(31 GPR and 6 SPR). All these designs use a Von Neumann architecture, thus the few versions comprising a cache do not separate data and instruction caches.

8. What are t, d, m, I stands for in ARM7TDMI? a) Timer, Debug, Multiplex, ICE b) Thumb, Debug, Multiplier, ICE c) Timer, Debug, Modulation, IS d) Thumb, Debug, Multiplier, ICE

12. In which of the following ARM processors virtual memory is present? a) ARM7DI b) ARM7TDMI-S c) ARM7TDMI d) ARM7EJ-S

15. What is the cache memory for ARM710T? a) 12Kb b) 16Kb c) 32Kb d) 8Kb

Answer: a Clarification: ARM7DI is capable of running a virtual memory system. The abort input to the processor may be used by the memory manager to inform ARM7DI of page faults.

Session – 1 Interview Questions from Embedded Systems, Microprocessor, Microcontrollers –

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